1. Field of the Invention
Embodiments relate to a semiconductor integrated circuit device and a method of fabricating the same. More particularly, the present invention relates to a semiconductor integrated circuit device including a finned field effect transistor (Fin-FET) and a manufacturing method thereof.
2. Description of the Related Art
As the integration density of semiconductor devices such as field effect transistors (FET) is increased, the gate electrode line width in these semiconductor devices is decreased, and the channel length and width is decreased. Such a channel length decrease can cause a short channel effect (SCE) such as drain induced barrier lowering (DIBL) and punch-through as well as narrow width effect which increases the transistor threshold voltage.
To overcome these undesired effects, a Fin-FET having an increased contact area between the substrate and the gate electrode has been developed. The Fin-FET includes a protruding silicon fin, and a gate electrode covering both the sides and the top of the silicon fin to form a channel. As a result of forming a channel on both sides and the top of the silicon fin, the channel width is increased. Additionally, as another result of forming a channel on both sides of the silicon fin, controllability of the gate electrode may be improved. Furthermore, current may be increased through the gate, as current may be able to flow through multiple sides of the channel in a Fin-FET such as described above.
Rapid increase in integration density, however, may result in undesired on/off characteristics of a resulting semiconductor device employing one or more Fin-FET configurations. Accordingly, there remains a need to develop a semiconductor integrated circuit device and a method of forming a semiconductor integrated circuit device that addresses at least some of these limitations.